A leading technology firm based in Dublin is seeking an IP Design Technical Lead/Staff ASIC RTL Design Engineer. The ideal candidate will have a solid background in ASIC RTL design, a Bachelor's or Master's degree in Electrical Engineering, and at least eight years of relevant experience. This role emphasizes mentoring, collaborative project work, and the implementation of advanced protocols. The successful candidate will contribute to complex and innovative designs in a dynamic environment, ensuring the delivery of high-performance IP cores. #J-18808-Ljbffr
Job Title IP Design Technical Lead/ Staff ASIC RTL Design Engineer We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are You are a passionate and forward-thinking digital design expert with a strong foundation in ASIC RTL design and a proven track record of delivering complex, high-performance IP cores. With a Bachelor’s or Master’s degree in EE, EC, or VLSI and over eight years of relevant industry experience, you thrive in dynamic, multi-site environments and excel at translating functional specifications into robust, scalable architectures. You’re adept at working with advanced protocols such as Ethernet, DDR, PCIe, and USB, and have hands‑on experience in data path and control path design, including Reed Solomon FEC, BCH codes, and MAC SEC engines. Your expertise extends to synthesizable Verilog/SystemVerilog coding, timing closure, CDC analysis, and P&R‑aware synthesis, complemented by a keen understanding of design trade‑offs in area, latency, and throughput. You are comfortable leveraging version control systems like Perforce and scripting languages such as Perl or Shell to automate and streamline workflows. As a natural leader, you are ready to mentor and technically guide a team of designers, fostering a collaborative and inclusive culture. Communication comes easily to you, and you’re known for your proactive problem‑solving skills, attention to detail, and unwavering commitment to design quality. You’re seeking an opportunity to take ownership of challenging projects, contribute to cutting‑edge innovation, and grow alongside a team of world‑class engineering professionals. What You’ll Be Doing Architecting and implementing state‑of‑the‑art RTL designs for the DesignWare IP family, targeting commercial, enterprise, and automotive applications. Translating standard and functional specifications into detailed micro‑architectures and comprehensive design documentation for medium to high complexity features. Leading and contributing hands‑on to RTL coding, synthesis, CDC analysis, debug, and test development tasks. Collaborating with global teams and engaging directly with customers to understand and refine specification requirements. Driving technical excellence in design processes, including linting, static timing analysis, formal checking, and P&R‑aware synthesis using tools such as Fusion Compiler. Mentoring and technically leading a team of designers, providing guidance on best practices and innovative design methodologies. Utilizing version control systems and scripting to manage design flows and automate repetitive tasks for improved efficiency. The Impact You Will Have Enable Synopsys to deliver industry‑leading, high‑performance IP cores that power next‑generation technologies. Contribute to the successful execution of complex, global projects that set new standards in chip design and verification. Accelerate time‑to‑market for customers in commercial, enterprise, and automotive sectors by delivering robust, reliable IP solutions. Elevate the technical capabilities of your team through mentorship and leadership, cultivating a culture of continuous learning and innovation. Drive improvements in design quality, efficiency, and scalability through process optimization and automation. Directly influence product architecture and feature enhancements, ensuring alignment with customer needs and emerging industry trends. What You’ll Need Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related field. 8+ years of hands‑on industry experience in ASIC RTL design, with a strong portfolio of completed projects. Proficiency in synthesizable Verilog/SystemVerilog, simulation tools, and design flows including lint, CDC, synthesis, and static timing analysis. Hands on experience with creating micro‑architecture/detailed design from Functional Specifications for medium/high design complexity. Must have worked on control path‑oriented designs like asynchronous FIFO, DMA architectures, SPRAM/DPRAM interface design, etc. Familiarity with high‑speed design (>600MHz), P&R‑aware synthesis, and EDA tools such as Fusion Compiler. Experience with version control systems (e.g., Perforce) and scripting languages (Perl, Shell) for design automation. Knowledge of industry protocols: Ethernet, DDR, PCIe, USB, MIPI‑UFS/Unipro, SD‑MMC, AMBA (AMBA2, AXI). Exposure to quality processes in IP design and verification is an advantage. Prior experience as a technical lead or mentor is highly desirable. Who You Are Innovative thinker with a solutions‑oriented mindset and a passion for technology. Excellent communicator who thrives in collaborative, multicultural, and multi‑site environments. Natural leader with mentoring abilities, fostering inclusion and diversity within the team. Detail‑oriented professional with strong analytical and problem‑solving skills. Self‑motivated, adaptable, and eager to drive technical excellence and process improvements. Committed to continuous learning and staying ahead of industry trends. The Team You’ll Be A Part Of You will join the R&D Solutions Group at our Bangalore Design Center, as part of the DesignWare IP Design team. This diverse and innovative group is dedicated to architecting, developing, and delivering cutting‑edge IP cores that enable Synopsys’ global customers to achieve their design goals. The team thrives on collaboration, technical excellence, and shared success, working in a supportive environment that values creativity, knowledge sharing, and continuous growth. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #J-18808-Ljbffr
A leading semiconductor company in Dublin is seeking an experienced professional in IP/SoC verification. You will leverage AI techniques to enhance verification processes, implement cutting-edge EDA tools, and mentor junior engineers. The ideal candidate has 5 to 10 years of experience, a Bachelor's degree in a related field, and strong programming skills. This role offers a dynamic work environment and the opportunity to shape the future of digital IP verification at a prominent tech firm. #J-18808-Ljbffr
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a visionary leader with a passion for customer success and technical excellence. With a proven track record in applications engineering and customer-facing roles, you thrive in fast-paced, collaborative environments where innovation and customer value are at the forefront. You have deep experience leading diverse, high-performing technical teams and are adept at building strong relationships with both internal stakeholders and external partners. Your strategic thinking and ability to translate complex technical challenges into actionable solutions set you apart. You are comfortable navigating ambiguity and can drive clarity and direction for your teams, ensuring alignment with organizational goals. Your communication skills are exceptional, enabling you to present complex concepts to both technical and non-technical audiences. You champion inclusion, mentorship, and continuous learning, fostering a culture where every team member feels empowered to contribute. You leverage data-driven insights to make decisions and are always seeking new ways to optimize processes, enhance service delivery, and exceed customer expectations. Above all, you are motivated by the opportunity to make a tangible impact—on your team, your customers, and the industry as a whole. What You’ll Be Doing: Leading and mentoring a high-performing applications engineering team, setting strategic direction and clear objectives. Collaborating cross-functionally with product, sales, and R&D teams to deliver innovative solutions tailored to customer needs. Driving customer engagement through technical leadership, ensuring successful adoption and integration of Synopsys solutions. Identifying market trends and customer feedback to inform product roadmaps and strategic initiatives. Developing and implementing scalable processes to optimize customer support and field engineering activities. Representing Synopsys at industry events, building the company’s reputation as a thought leader and trusted partner. Managing resource allocation, budgets, and project timelines to ensure operational excellence. The Impact You Will Have: Accelerate customer success by ensuring timely and effective solution delivery. Enhance Synopsys’ market leadership through exemplary technical support and innovation. Drive adoption of Synopsys products, directly influencing revenue growth and customer loyalty. Shape product direction by providing critical customer insights to development teams. Strengthen organizational agility by developing best practices and scalable processes. Foster a collaborative and inclusive culture that attracts and retains top talent. What You’ll Need: Extensive experience in applications engineering, technical support, or related roles within the semiconductor or EDA industry. Strong background in chip design, verification, or IP integration technologies. Demonstrated leadership and people management skills, including experience leading large, distributed teams. Proficiency in strategic planning, resource management, and process optimization. Excellent communication and presentation skills, with the ability to influence stakeholders at all levels. Familiarity with customer engagement methodologies and tools. Key Responsibilities: Provide strategic leadership and vision for the applications engineering team specializing in hardware-assisted verification. Develop and execute plans to deliver high-impact solutions that address customer needs in hardware verification environments. Collaborate with product management, engineering, and sales to define product requirements and support go-to-market strategies. Build and mentor a world-class technical team, fostering professional growth and excellence. Engage directly with key customers to understand their challenges and deliver tailored application support. Drive continuous improvement of engineering processes, methodologies, and tools. Represent the applications engineering function in executive meetings and industry events. Ensure compliance with company policies, quality standards, and regulatory requirements. Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field; PhD preferred. 15+ years of experience in applications engineering, with at least 5 years in a leadership role. Deep expertise in hardware-assisted verification technologies (e.g., emulation, prototyping, FPGA-based verification). Proven track record of building and leading high-performing engineering teams. Strong communication, presentation, and stakeholder management skills. Experience working with enterprise customers in complex technical environments. Preferred Skills: Experience with EDA tools and hardware/software co-verification. Familiarity with industry standards and best practices for verification processes. Ability to drive innovation and manage cross-functional projects. The Team You’ll Be A Part Of: You’ll join the Customer Application Services organization—a dynamic, globally distributed team focused on enabling Synopsys customers to achieve maximum value from our solutions. The team partners closely with R&D, Sales, and Product Management, providing technical expertise, innovative problem-solving, and world-class support. Together, we drive customer success and contribute to Synopsys’ reputation as a trusted technology leader. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #J-18808-Ljbffr
We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are: You are a visionary and highly experienced engineering professional, passionate about verification and digital design methodologies. With at least 5 to 10 years of solid experience in IP and SoC verification, you have consistently demonstrated technical excellence and leadership in your career. You thrive in challenging environments and are adept at architecting robust verification infrastructures from the ground up, particularly within the EDA ecosystem. You possess deep hands‑on knowledge of industry-leading tools such as Synopsys VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs. Your expertise enables you to design unified reference flows and scalable methodologies that empower teams and accelerate project success. You excel at independently owning and delivering on complex assignments, while also being a collaborative team player who enjoys mentoring and elevating junior engineers. Your communication skills are outstanding, allowing you to articulate technical concepts to diverse audiences and influence cross‑functional teams. You have a proven ability to multi‑task, manage priorities, and drive technical initiatives with a strategic mindset. Your academic foundation includes a bachelor’s degree in electronics, electrical, or computer engineering, and you continuously seek to expand your knowledge and impact in the field of digital IP verification. You are ready to take on a leadership role, shaping methodology and best practices for the next generation of high-performance silicon designs. What You’ll Be Doing: Applying AI techniques to accelerate design verification – leveraging internal and/or external agentic AI tools to generate verification plan, testcases, coverage and debug collaterals Implementing reference and unified verification flows for Synopsys digital IP products using leading EDA tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs. Building robust, scalable verification infrastructures from the ground up to support diverse and complex IP and SoC projects. Partnering with global engineering teams to define, document, and propagate best-in-class verification methodologies and standards. Leading and mentoring junior engineers, fostering a culture of technical growth, innovation, and collaboration within the team. Driving technical initiatives and independently managing high-impact assignments, ensuring timely and high-quality deliverables. Collaborating closely with tool development teams to influence product evolution and optimize verification workflows for maximum efficiency. Supporting customers and internal stakeholders by troubleshooting, optimizing, and refining verification processes and flows. The Impact You Will Have: Elevate Synopsys’ digital IP verification capabilities by delivering robust, unified, and scalable methodology solutions. Accelerate time-to-market for high-performance silicon products by streamlining and standardizing verification processes. Empower global verification teams with best-in-class flows, tools, and practices, driving consistent project success. Shape the verification strategy for next-generation Synopsys IP and SoC offerings, directly influencing product quality and customer satisfaction. Mentor and develop the next wave of verification engineers, fostering a culture of learning and technical excellence. Contribute to the evolution of Synopsys’ EDA tool ecosystem by providing critical feedback and championing innovative solutions. Enhance Synopsys’ leadership position in the semiconductor industry through continuous improvement and adoption of cutting-edge verification methodologies. What You’ll Need: Minimum 5 to 10 years of hands‑on experience in IP/SoC verification, with a proven track record of hands‑on technical contributions. Good understanding of Agentic AI technologies specifically Cursor and/or VS Code co‑pilot. Passion to learn Agentic AI mechanisms and apply them for design verification. Familiarity with Synopsys verification tools such as VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs. Demonstrated ability to validate verification flows and infrastructure for complex digital designs. Exposure to Agentic AI EDA tools will be a big plus. Solid programming and scripting skills (SystemVerilog, UVM, Tcl, Python or similar languages). Bachelor’s degree in electronics, electrical, or computer engineering (advanced degrees a plus). Experience with multi‑tasking and managing technical projects independently. Ability to document, communicate, and propagate technical methodologies across global teams. Who You Are: Innovative problem solver who thrives in dynamic, fast‑paced environments. Excellent communicator, able to distill complex technical topics for diverse audiences. Natural mentor and team player, passionate about knowledge‑sharing and team development. Strategic thinker with a keen eye for detail and a commitment to quality. Self‑motivated leader who takes initiative and drives projects to successful completion. Adaptable, resilient, and eager to learn and grow alongside industry leaders. The Team You’ll Be A Part Of: You will be a core member of the newly established Digital IP Verification Methodology (COE) team, a group of forward‑thinking engineers dedicated to advancing verification excellence at Synopsys. The team collaborates across global sites, driving innovation in methodology, tool integration, and best practices. Together, you will shape the future of digital IP verification, enabling Synopsys and its customers to deliver world‑class silicon solutions. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #J-18808-Ljbffr
## OverviewOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries. You are a visionary and highly experienced engineering professional, passionate about verification and digital design methodologies. With at least 5 to 10 years of solid experience in IP and SoC verification, you have consistently demonstrated technical excellence and leadership in your career. You thrive in challenging environments and are adept at architecting robust verification infrastructures from the ground up, particularly within the EDA ecosystem. You possess deep hands-on knowledge of industry-leading tools such as Synopsys VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs. Your expertise enables you to design unified reference flows and scalable methodologies that empower teams and accelerate project success. You excel at independently owning and delivering on complex assignments, while also being a collaborative team player who enjoys mentoring and elevating junior engineers. Your communication skills are outstanding, allowing you to articulate technical concepts to diverse audiences and influence cross-functional teams. You have a proven ability to multi-task, manage priorities, and drive technical initiatives with a strategic mindset. Your academic foundation includes a bachelor’s degree in electronics, electrical, or computer engineering, and you continuously seek to expand your knowledge and impact in the field of digital IP verification. You are ready to take on a leadership role, shaping methodology and best practices for the next generation of high-performance silicon designs. \* Solid programming and scripting skills (SystemVerilog, UVM, Tcl, Python or similar languages). \* Experience with multi-tasking and managing technical projects independently. \* Natural mentor and team player, passionate about knowledge-sharing and team development.## BenefitsAt Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.* ### Health & Wellness Comprehensive medical and healthcare plans that work for you and your family.* ### Time Away In addition to company holidays, we have ETO and FTO Programs.* ### Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.* ### ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.* ### Retirement Plans Save for your future with our retirement plans that vary by region and country.\*\* Benefits vary by country and region - check with your recruiter to confirm- ### Compensation Competitive salaries.### ApplyWhen you apply to join us, your resume, skills, and experience are first reviewed for consideration.### Phone ScreenOnce your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have.### InterviewNext up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role.### OfferCongratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept!BROWSE JOBS## Find the open role that’s **right for you*** Sunnyvale, California* Mississauga, Canada* Sunnyvale, California* Dublin, IrelandView all job opportunitiesView all job opportunities #J-18808-Ljbffr
Job Title IP Design Technical Lead/ Staff ASIC RTL Design Engineer We Are At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation. You Are You are a passionate and forward-thinking digital design expert with a strong foundation in ASIC RTL design and a proven track record of delivering complex, high-performance IP cores. With a Bachelor’s or Master’s degree in EE, EC, or VLSI and over four years of relevant industry experience, you thrive in dynamic, multi-site environments and excel at translating functional specifications into robust, scalable architectures. You’re adept at working with advanced protocols such as Ethernet, DDR, PCIe, and USB, and have hands‑on experience in data path and control path design, including Reed Solomon FEC, BCH codes, and MAC SEC engines. Your expertise extends to synthesizable Verilog/SystemVerilog coding, timing closure, CDC analysis, and P&R‑aware synthesis, complemented by a keen understanding of design trade‑offs in area, latency, and throughput. You are comfortable leveraging version control systems like Perforce and scripting languages such as Perl or Shell to automate and streamline workflows. As a natural leader, you are ready to mentor and technically guide a team of designers, fostering a collaborative and inclusive culture. Communication comes easily to you, and you’re known for your proactive problem‑solving skills, attention to detail, and unwavering commitment to design quality. You’re seeking an opportunity to take ownership of challenging projects, contribute to cutting‑edge innovation, and grow alongside a team of world‑class engineering professionals. What You’ll Be Doing Architecting and implementing state‑of‑the‑art RTL designs for the DesignWare IP family, targeting commercial, enterprise, and automotive applications. Translating standard and functional specifications into detailed micro‑architectures and comprehensive design documentation for medium to high complexity features. Leading and contributing hands‑on to RTL coding, synthesis, CDC analysis, debug, and test development tasks. Collaborating with global teams and engaging directly with customers to understand and refine specification requirements. Driving technical excellence in design processes, including linting, static timing analysis, formal checking, and P&R‑aware synthesis using tools such as Fusion Compiler. Mentoring and technically leading a team of designers, providing guidance on best practices and innovative design methodologies. Utilizing version control systems and scripting to manage design flows and automate repetitive tasks for improved efficiency. The Impact You Will Have Enable Synopsys to deliver industry‑leading, high‑performance IP cores that power next‑generation technologies. Contribute to the successful execution of complex, global projects that set new standards in chip design and verification. Accelerate time‑to‑market for customers in commercial, enterprise, and automotive sectors by delivering robust, reliable IP solutions. Elevate the technical capabilities of your team through mentorship and leadership, cultivating a culture of continuous learning and innovation. Drive improvements in design quality, efficiency, and scalability through process optimization and automation. Directly influence product architecture and feature enhancements, ensuring alignment with customer needs and emerging industry trends. What You’ll Need Bachelor’s or Master’s degree in Electrical Engineering, Electronics, VLSI, or related field. 4+ years of hands‑on industry experience in ASIC RTL design, with a strong portfolio of completed projects. Deep expertise in data path and control path design, including experience with Reed Solomon FEC, BCH codes, CRC architectures, and MAC SEC engines. Proficiency in synthesizable Verilog/SystemVerilog, simulation tools, and design flows including lint, CDC, synthesis, and static timing analysis. Familiarity with high‑speed design (>600MHz), P&R‑aware synthesis, and EDA tools such as Fusion Compiler. Experience with version control systems (e.g., Perforce) and scripting languages (Perl, Shell) for design automation. Knowledge of industry protocols: Ethernet, DDR, PCIe, USB, MIPI‑UFS/Unipro, SD‑MMC, AMBA (AMBA2, AXI). Exposure to quality processes in IP design and verification is an advantage. Prior experience as a technical lead or mentor is highly desirable. Who You Are Innovative thinker with a solutions‑oriented mindset and a passion for technology. Excellent communicator who thrives in collaborative, multicultural, and multi‑site environments. Natural leader with mentoring abilities, fostering inclusion and diversity within the team. Detail‑oriented professional with strong analytical and problem‑solving skills. Self‑motivated, adaptable, and eager to drive technical excellence and process improvements. Committed to continuous learning and staying ahead of industry trends. The Team You’ll Be A Part Of You will join the R&D Solutions Group at our Bangalore Design Center, as part of the DesignWare IP Design team. This diverse and innovative group is dedicated to architecting, developing, and delivering cutting‑edge IP cores that enable Synopsys’ global customers to achieve their design goals. The team thrives on collaboration, technical excellence, and shared success, working in a supportive environment that values creativity, knowledge sharing, and continuous growth. Rewards and Benefits We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. #J-18808-Ljbffr
Alternate Job Titles: Senior AMS Circuit Designer Analog IP Design Specialist Staff Mixed Signal PHY Engineer We Are: At Synopsys, we drive innovations that shape the way we live and connect. Our technology powers the Era of Pervasive Intelligence, from self-driving cars to AI. We lead in chip design, verification, and IP integration, enabling high-performance silicon chips and software content. Join us and help transform the future! You Are: You are an experienced analog/mixed-signal circuit designer with 8+ years in high-speed PHY design and at least 3 years leading projects or teams. You thrive in collaborative, multicultural environments and have strong English communication skills. You’re eager to work with the latest technologies, mentor others, and grow in both technical and leadership tracks. Adaptable, positive, and humble, you enjoy solving complex technical challenges while fostering teamwork and innovation. What You’ll Be Doing: Designing analog IPs like High Speed IOs, PLLs, and Bandgaps for advanced protocols (UCIe, DDR, SerDes PHY). Collaborating with layout engineers and performing post-layout verifications. Solving noise, margin, and signal/power integrity issues. Completing design and data quality checks. Leading and participating in global design reviews. Mentoring junior engineers and supporting research or new product initiatives. The Impact You Will Have: Deliver industry-leading analog/mixed-signal IP for cutting-edge applications. Enhance Synopsys’ leadership in the semiconductor IP space. Support customers in achieving high performance and reliability. Promote innovation and technical excellence within the team. Mentor and develop future engineering talent. Advance the adoption of next-gen technologies. What You’ll Need: BS/MS/PhD in Electronics Engineering or related field. 8+ years of high-speed mixed-signal PHY design experience. 3+ years in design/project leadership roles. Expertise in analog/mixed-signal design and verification. Strong English skills; research experience is a plus. Who You Are: Collaborative, positive, and growth-minded. Humble, approachable, and eager to mentor. Adaptable and open to feedback and learning. The Team You’ll Be A Part Of: Work with top global experts and a talented Vietnam-based team. Enjoy a professional, innovative, and inclusive culture, with access to the latest technologies and a clear career path. Rewards and Benefits: We offer a comprehensive range of health, wellness, and financial benefits. Your recruiter will share details about salary and benefits during the hiring process. Competitive salary and bonuses Health insurance & wellness programs Sports clubs & social activities International travel and training opportunities Clear paths for career advancement #J-18808-Ljbffr
A leading semiconductor company in Dublin seeks a Hardware Engineer with 5 to 10 years of experience in IP and SoC verification. You will design and develop innovative semiconductor solutions and mentor junior engineers. The ideal candidate will possess strong knowledge of SystemVerilog and tools like Synopsys VCS and Verdi, along with excellent communication and leadership skills. The role offers competitive salaries and comprehensive benefits, contributing to a high-performance team environment. #J-18808-Ljbffr
## OverviewOur Hardware Engineers at Synopsys are responsible for designing and developing cutting-edge semiconductor solutions. They work on intricate tasks such as chip architecture, circuit design, and verification to ensure the efficiency and reliability of semiconductor products. These engineers play a crucial role in advancing technology and enabling innovations in various industries.You are a visionary and highly experienced engineering professional, passionate about verification and digital design methodologies. With at least 5 to 10 years of solid experience in IP and SoC verification, you have consistently demonstrated technical excellence and leadership in your career. You thrive in challenging environments and are adept at architecting robust verification infrastructures from the ground up, particularly within the EDA ecosystem. You possess deep hands-on knowledge of industry-leading tools such as Synopsys VCS, Verdi, VMS Execution Manager, Verdi Planner (HVP), and VIPs. Your expertise enables you to design unified reference flows and scalable methodologies that empower teams and accelerate project success. You excel at independently owning and delivering on complex assignments, while also being a collaborative team player who enjoys mentoring and elevating junior engineers. Your communication skills are outstanding, allowing you to articulate technical concepts to diverse audiences and influence cross-functional teams. You have a proven ability to multi-task, manage priorities, and drive technical initiatives with a strategic mindset. Your academic foundation includes a bachelor’s degree in electronics, electrical, or computer engineering, and you continuously seek to expand your knowledge and impact in the field of digital IP verification. You are ready to take on a leadership role, shaping methodology and best practices for the next generation of high-performance silicon designs.\* Solid programming and scripting skills (SystemVerilog, UVM, Tcl, Python or similar languages).\* Experience with multi-tasking and managing technical projects independently.\* Natural mentor and team player, passionate about knowledge-sharing and team development.## BenefitsAt Synopsys, innovation is driven by our incredible team around the world. We feel honored to work alongside such talented and passionate individuals who choose to make a difference here every day. We're proud to provide the comprehensive benefits and rewards that our team truly deserves.* ### Health & Wellness Comprehensive medical and healthcare plans that work for you and your family.* ### Time Away In addition to company holidays, we have ETO and FTO Programs.* ### Family Support Maternity and paternity leave, parenting resources, adoption and surrogacy assistance, and more.* ### ESPP Purchase Synopsys common stock at a 15% discount, with a 24 month look-back.* ### Retirement Plans Save for your future with our retirement plans that vary by region and country.\*\* Benefits vary by country and region - check with your recruiter to confirm- ### Compensation Competitive salaries.### ApplyWhen you apply to join us, your resume, skills, and experience are first reviewed for consideration.### Phone ScreenOnce your resume has been selected, a recruiter and/or hiring manager will reach out to learn more about you, share more about the role, and answer any questions you might have.### InterviewNext up is interviewing (in person or virtual). You’ll be invited to meet with members of the hiring team to discuss your skills and experience, and what you’re looking for in your next role.### OfferCongratulations! When you have been selected for the role, your recruiter will reach out to make you a verbal offer (a written offer will follow your conversation), and we hope you accept!BROWSE JOBS## Find the open role that’s **right for you*** Dublin, Ireland* San Jose, California* Markham, Canada* Chandler, ArizonaView all job opportunitiesView all job opportunities #J-18808-Ljbffr
